Codasip implements CHERI for first commercial fine-grained memory  

The first commercial implementation of Capability Hardware Enhanced RISC Instructions (CHERI) technology is available for the first time in a commercial offering, said Codasip. It has used Codasip Studio to add built-in fine-grained memory protection to its recently launched 700 processor family by extending the RISC-V ISA with CHERI-based custom instructions. This provides processor security […]

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